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 Preliminary Technical Data
FEATURES
Easy to Use Programmable Gains: 1, 2, 5, 10 Digital or Pin Programmable Gain Setting Temp Range -40C to 85C EXCELLENT DC PERFORMANCE High CMRR 100dB G=10 Low Gain Drift: 10ppm/C Low Offset Drift: 1uV/C Low Offset: 70uV G=10 EXCELLENT AC PERFORMANCE Fast Settle Time: 0.5us to 0.01% High Slew Rate: 20V/s High CMRR over Frequency: 80dB to 50kHz Low Noise: 13nVHz, G=10 Low Power: 3.5 mA (typ) Supply: 5V to 12V Applications Data Acquisition Bio-Medical Analysis Test and Measurement High Performance System Monitoring
12MHz 20V/s G=1,2,5,10 Programmable Gain iCMOSTM Instrumentation Amplifier AD8250
30 20
10
Gain (dB )
0
-10
-20
-30 100Hz 1kHz 10kHz 1MHz 100kHz Frequency 10MHz 100MHz 1GHz
Figure 2. Gain vs Frequency
GENERAL DESCRIPTION The AD8250 is a digitally gain programmable instrumentation amplifier that has high G input impedance and low distortion making it suitable for sensor interfacing and driving high sample rate analog to digital converters. It has high bandwidth of 12MHz, low distortion and settle time of 0.5us to 0.01%. Offset drift and gain drift are limited to 1uV/C and 10ppm/C respectively. In addition to its wide input common-voltage range, it boasts a high common-mode rejection of 80dB at G=1 from DC to 50kHz. The combination of precision DC performance coupled with high speed capabilities make the AD8250 an excellent candidate for data acquisition and medical applications. Furthermore, this monolithic solution simplifies design, manufacturing and boosts performance of instrumentation by maintaining tight match of internal resistors and amplifiers.
OUT
DGD
WR
A1
A0
-IN
Logic
+IN
AD8250
+VS
-VS
REF
Figure 1. Functional Block Diagram
The AD8250's user interface comprises of a parallel port that allows users to set the gain in one of three different ways. A two bit word sent to A1 and A2, via a bus may be latched using the WR input. An alternative is to set the gain within 1s by using the gain port in transparent mode where the state of A0 and A1 directly set the gain. The last method is to strap A1 and A2 to a high or low voltage potential, permanently setting the gain. The AD8250 is available in a 10 pin MSOP package and specified over -40C to 85C, making it an excellent solution for applications where size and packing density are
Rev.PrB
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective companies.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. www.analog.com Tel: 781.329.4700 Fax: 781.326.8703 (c) 2006 Analog Devices, Inc. All rights reserved.
AD8250
important considerations.
Preliminary Technical Data
TABLE OF CONTENTS
AD8250--Specifications.................................................................. 3 Timing Diagram ........................................................................... 5 Absolute Maximum Ratings............................................................ 6 Pin Configurations And Functional Descriptions ....................... 7 Transparent Gain Setting Mode: .................................................7 Write Enable Gain Setting Mode:................................................7 Outline Dimensions ..........................................................................8 ESD Caution...................................................................................8 Preliminary Revision : B
REVISION HISTORY
Rev. PrB | Page 2 of 8
Preliminary Technical Data AD8250--SPECIFICATIONS
Table 1. VS = 12 V, VREF = 0 V (@TA = 25oC, G = +1, RL = 2 k, unless otherwise noted.)
Parameter COMMON-MODE REJECTION RATIO (CMRR) CMRR to 60 Hz with 1 k Source Imbalance Conditions Min
AD8250
AD8250ARM Typ Max
Unit
CMRR to 50kHz
VCM = -10 V to +10 V G=1 G=2 G=5 G = 10 VCM = -10 V to +10 V G=1 G=2 G=5 G = 10 G=1 G=2 G=5 G=10 G=1 G=2 G=5 G=10 f = 1kHz G=1, VS = 5 V to 12 V T = -40C to +85C T = -40C to +85C G=2, VS = 5 V to 12 V T = -40C to +85C T = -40C to +85C G=5, VS = 5 V to 12 V T = -40C to +85C T = -40C to +85C G=10, VS = 5 V to 12 V T = -40C to +85C T = -40C to +85C VS = 8 V to 12 V
80 86 94 100 80
dB dB dB
dB dB dB dB dB
NOISE Voltage Noise, 1kHz
32 20 14 13
nV/Hz nV/Hz nV/Hz nV/Hz V p-p V p-p V p-p V p-p fA/Hz
RTI, 0.1 Hz to 10 Hz
Current Noise VOLTAGE OFFSET Offset, VOS Over Temperature Average TC Offset, VOS Over Temperature Average TC Offset, VOS Over Temperature Average TC Offset, VOS Over Temperature Average TC Offset Referred to the Input vs. Supply (PSR) G=1 G=2 G=5 G = 10
250
V V V/C
150
V V V/C
90
V V V/C
70
V V V/C
96
115 110 110 110
dB dB dB dB
INPUT CURRENT Input Bias Current Over Temperature
10 T = -40C to +85C
Rev. PrB| Page 3 of 8
25 35
nA nA
AD8250
Parameter Average TC Input Offset Current Over Temperature Average TC DYNAMIC RESPONSE Small Signal -3dB Bandwidth Conditions
Preliminary Technical Data
Min AD8250ARM Typ Max 5 T = -40C to +85C 1.5 10 Unit
pA/C nA nA pA/C
Settling Time 0.01%
Settling Time 0.001%
G=1 G=2 G=5 G=10 10 V Step G=1 G=2 G=5 G=10 10 V Step G=1 G=2 G=5 G=10 G=1 G=2 G=5 G=10 20 30 30 30
17 15 10 3.5 0.5
MHz MHz MHz MHz S S S S
S S S S
1.5
Slew Rate
35 35 35 35
V/S V/S V/S V/S
Total Harmonic Distortion + Noise GAIN Gain Range: 1, 2, 5, 10 Gain Error
RL = 100kOhms, G=1 RL = 2kOhms, G=1 1 VOUT= 10 V G=1 G=2 G=5 G=10 VOUT = -10 V to +10 V G=1, RL = 10 k G=2, RL = 10 k G=5, RL = 10 k G=10, RL = 10 k G=1-10, RL = 2 k All Gains 0.05 10
% % V/V %
Gain Nonlinearity
Gain Nonlinearity Gain vs. Temperature INPUT Input Impedance Differential Common Mode Input Operating Voltage Range Over Temperature
4 4 4 4 4 10
ppm ppm ppm ppm ppm ppm/C
1|| 2 1|| 2 VS = 5 V to 12 V T = -40C to +85C
Rev. PrB | Page 4 of 8
G|| pF G|| pF
-Vs + 1
+Vs 1.5
V V
Preliminary Technical Data
Parameter OUTPUT Output Swing Over Temperature Short Circuit Current REFERENCE INPUT RIN IIN Voltage Range Gain to Output Digital Logic Inputs Digital Ground Voltage, DGND Digital Input Voltage Low Digital Input Voltage High Digital Input Leakage Current Gain Switching Time TSU THD TWR_LO TWR_HI POWER SUPPLY Operating Range3 Quiescent Current Over Temperature TEMPERATURE RANGE Specified Performance Conditions RL = 10 k, VS = 5 V to 12 V T = -40C to +85C -Vs + 1.5 20 20 VIN+, VIN-, VREF = 0 -Vs +Vs Min
AD8250
AD8250ARM Typ Max +Vs - 1.5 Unit
V V mA k A V V/V V V
Referenced to DGND Referenced to DGND
1 4
V V pA ns ns ns ns ns
5 3.5 T = -40C to +85C -40
12
mA mA
+85
C
TIMING DIAGRAM
tWR-HI WR tSU A0, A1 tHD
tWR-LO
Figure 3.Timing Diagram
Rev. PrB| Page 5 of 8
AD8250 ABSOLUTE MAXIMUM RATINGS
Board)
Preliminary Technical Data
Table 2. AD8250 Absolute Maximum Ratings
Parameter Supply Voltage Power Dissipation Output Short Circuit Current Common-Mode Input Voltage Differential Input Voltage Storage Temperature Operating Temperature Range Lead Temperature Range (Soldering 10 sec) Junction Temperature JA (4 layer JEDEC Standard Rating +/-14V See Figure 2 -Vs - 0.5 V to +Vs + 0.5 V V -65C to +125C -40C to +85C C C C/W
Package Glass Transition Temperature ESD (Human Body Model) ESD (Charge Device Model) ESD (Machine Model)
C kV kV kV
Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other condition s above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
Rev. PrB | Page 6 of 8
Preliminary Technical Data PIN CONFIGURATIONS AND FUNCTIONAL DESCRIPTIONS
-IN 1 DGND 2 -VS 3
10 +IN
AD8250
TRANSPARENT GAIN SETTING MODE:
In this mode, the gain is set by toggling A0 and A1 to HIGH or LOW. To enable transparent mode, tie WR to -Vs. This configures the AD8250 to change gains when A0 and A1 are set according to Table 4. Table 4. . Transparent Mode Gain Settings G 1 2 5 10 WR -Vs -Vs -Vs -Vs A1 LO LO HI HI A0 LO HI LO HI
AD8250
9 8
VREF +VS
TOP VIEW A0 4 (Not to Scale) 7 VOUT A1 5
6
WR
Figure 4. 10-Lead MSOP
WRITE ENABLE GAIN SETTING MODE:
Table 3. Pin Function Descriptions-- 10-Lead MSOP(ARM PACKAGE)
Pin No. 1 2 3 4 5 6 7 8 9 Name -IN DGND -Vs A0 A1 WR VOUT +Vs VREF Description Inverting Input Terminal (True differential input) Digital Ground. Negative Supply Terminal Gain Setting Pin (LSB) Gain Setting Pin (MSB) Write Enable Output Terminal Positive Supply Terminal Reference Voltage Terminal (drive this pin with a low impedance voltage source to level shift the output signal) Non-inverting Input Terminal (True differential input)
In this mode, the gains are changed only during the negative edge of the WR strobe. So for instance, the gain is determined by the two bit value held on A0 and A1 at the time the WR strobe transitions from HIGH to LOW.
tWR-HI WR tSU A0, A1 tHD tWR-LO
Table 5. : Write Enable Mode Gain Settings Gain (changes to) 1 2 5 WR HI -> LO HI -> LO HI -> LO HI -> LO LO->LO LO->HI HI-> HI A1 LO LO HI HI X X X A0 LO HI LO HI X X X
10
+IN
GAIN SETTING
The AD8250's gains are set digitally. The A0 and A1 pins must be set either HIGH or LOW with respect to digital ground, DGND. The WR pin is a tri-state switch. It may be set to one of three levels, HIGH, LOW or to -VS. A HIGH signal is typically greater than 4V but less than 6V and a LOW signal is typically less than 1V but higher than DGND, 0V. Gains can be programmed using the following methods:
10 No Change No Change No Change X = don't care
.
Rev. PrB| Page 7 of 8
AD8250 OUTLINE DIMENSIONS
3.10 3.00 2.90 3.10 3.00 2.90 PIN 1 0.50 BSC 0.95 0.85 0.75 0.15 0.05 0.33 0.17 COPLANARITY 0.10 COMPLIANT TO JEDEC STANDARDS MO-187-BA 1.10 MAX 8 0
10 6
Preliminary Technical Data
1
5
SEATING PLANE
0.23 0.08
0.80 0.60 0.40
Figure 5. 10 Lead MSOP (RM) - Dimensions shown in millimeters
ESD CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although this product features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality.
Table 6. Ordering Guide
AD00000 Products AD8250ARZ AD8250ARZ-RL AD8250ARZ-R7 AD8250-EVAL Temperature Package -40C to +85C -40C to +85C -40C to +85C Package Description 10-Lead MSOP 10-Lead MSOP 10-Lead MSOP Evaluation Board Package Option RM-10 RM-10 RM-10 Branding
Rev. PrB | Page 8 of 8
PR06288-0-8/06(PrB)
5.15 4.90 4.65


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